Using Cyclone III FPGAs for Clearer LCD HDTV Implementation

Today's liquid crystal display (LCD) technology has found a great application with high-definition TV (HDTV), but the challenge has been to achieve high resolution, which requires faster data rates. Accelerating data rates require special image processing algorithms to support faster moving video. The industry is confronted with a major problem: how do you implement these algorithms and get a product out to market first, and do it within a known power budget?

To compound the problem, designers need to determine how to reconfigure the image-processing algorithms when the hardware platform connects to different sizes of LCD panels. Larger LCD panels require faster data rates, so the challenge is how to adjust the data rate for the panel size.

Those challenges are easily managed with the new low-cost Cyclone® III FPGA family. Designers can apply image-processing algorithms in Cyclone III FPGAs to convert and map digital video signals onto the display panel. In addition, designers can take advantage of the Cyclone III FPGA's flexibility to reconfigure image-processing algorithms to increase the data rate for larger display panels. Thus, designers can develop a common hardware platform for all of their LCD panels, no matter the size.

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